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7721 bảng dữ liệu(PDF) 157 Page - Renesas Technology Corp |
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7721 bảng dữ liệu(HTML) 157 Page - Renesas Technology Corp |
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157 / 577 page ![]() TIMER A 7721 Group User’s Manual 8–38 8.6 Pulse width modulation (PWM) mode 8.6 Pulse width modulation (PWM) mode In this mode, the timer continuously outputs pulses which have an arbitrary width. (Refer to “Table 8.6.1.”) Timers A2 to A4 can be used in this mode. Figure 8.6.1 shows the structures of the timer Aj mode registers and timer Aj registers in the PWM mode. Table 8.6.1 Specifications of PWM mode Item Count source Count operation PWM period/“H” level width Count start condition Count stop condition Interrupt request occurrence timing TAjIN pin’s function TAjOUT pin’s function Read from timer Aj register Write to timer Aj register Specifications f2, f16, f64, or f512 q Countdown (operating as an 8-bit or 16-bit pulse width modulator) q Reload register’s contents are reloaded at rising edge of PWM pulse, and counting continues. q A trigger generated during counting does not affect the counting. <16-bit pulse width modulator> <8-bit pulse width modulator> q When a trigger is generated. (Note) q Internal or external trigger can be selected by software. When the count start bit is cleared to “0.” At falling edge of PWM pulse Programmable I/O port or trigger input PWM pulse output An undefined value is read out. q While counting is stopped When a value is written to the timer Aj register, it is written to both of the reload register and counter. q While counting is in progress When a value is written to the timer Aj register, it is written only to the reload register. (Transferred to the counter at the next reload time.) Period = (216–1) fi [s] n fi “H” level width = [s] Period = (m + 1)(28–1) fi “H” level width = [s] n(m + 1) fi n : Timer Aj register’s set value [s] m : Timer Aj register low-order 8 bits’ set value n : Timer Aj register high-order 8 bits’ set value Note: The trigger is generated with the count start bit = “1.” |
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