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7721 bảng dữ liệu(PDF) 142 Page - Renesas Technology Corp

tên linh kiện 7721
Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  577 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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TIMER A
7721 Group User’s Manual
8–23
8.4 Event counter mode
8.4.2 Operation in event counter mode
Œ When the count start bit is set to “1,” the counter starts counting of the count source’s valid edges.
 When a counter underflow or overflow occurs, the reload register’s contents are reloaded, and counting
continues.
Ž The timer Aj interrupt request bit is set to “1” at the underflow or overflow in .
The interrupt request bit remains set to “1” until the interrupt request is accepted or the interrupt request
bit is cleared to “0” by software.
Figure 8.4.4 shows an example of operation in the event counter mode.
Fig. 8.4.4 Example of operation in event counter mode (without pulse output and two-phase pulse
signal processing functions)
Timer Aj interrupt
request bit
FFFF16
n
000016
Time
Count start bit
n = Reload register’s contents
Cleared to “0” when interrupt request is accepted or cleared by software.
Set to “1” by software.
Starts counting.
Up-down bit
Note: The above applies when the up-down bit’s contents are selected as the up-down switching factor (i.e., up-down
switching factor select bit = “0” ).
Set to “1” by software.



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