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7721 bảng dữ liệu(PDF) 137 Page - Renesas Technology Corp |
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7721 bảng dữ liệu(HTML) 137 Page - Renesas Technology Corp |
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137 / 577 page ![]() TIMER A 7721 Group User’s Manual 8–18 8.4 Event counter mode 8.4 Event counter mode In this mode, the timer counts an external signal. (Refer to “Tables 8.4.1 and 8.4.2.”) Timers A2 to A4 can be used in this mode. Figure 8.4.1 shows the structures of the timer Aj mode register and timer Aj register in the event counter mode. Table 8.4.1 Specifications of event counter mode (when not using two-phase pulse signal processing function) Specifications q External signal input to the TAjIN pin q The count source’s valid edge can be selected from the falling edge and the rising edge by software. q Countup or countdown can be switched by external signal or software. q When a counter overflow or underflow occurs, reload register’s contents are reloaded, and counting continues. q For countdown q For countup When the count start bit is set to “1.” When the count start bit is cleared to “0.” When a counter overflow or underflow occurs. Count source input Programmable I/O port, pulse output, or countup/countdown switch signal input Counter value can be read out. q While counting is stopped When a value is written to the timer Aj register, it is written to both of the reload register and counter. q While counting is in progress When a value is written to the timer Aj register, it is written only to the reload register. (Transferred to the counter at the next reload time.) Item Count source Count operation Division ratio Count start condition Count stop condition Interrupt request occurrence timing TAjIN pin’s function TAjOUT pin’s function Read from timer Aj register Write to timer Aj register 1 (n + 1) 1 (FFFF16 – n + 1) n : Timer Aj register’s set value |
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