SH7721 datasheet(303/1524 Pages) RENESAS

tên linh kiện	SH7721

Giải thích chi tiết về linh kiện	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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nhà sản xuất	RENESAS [Renesas Technology Corp]

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Section 7 Exception Handling

Rev. 3.00 Jan. 18, 2008 Page 241 of 1458

REJ09B0033-0300

7.5

Usage Notes

An instruction assigned at a delay slot of the RTE instruction is executed after the contents of

the SSR is restored into the SR. An acceptance of an exception related to instruction access is

determined according to the SR before restore. An acceptance of other exceptions is

determined by processing mode of the SR after restore, and BL bit value. A processing-

completion type exception is accepted before an instruction at the RTE branch destination

address is executed. However, note that the correct operation cannot be guaranteed if a re-

execution type exception occurs.

In an instruction assigned at a delay slot of the RTE instruction, a user break cannot be

accepted.

If the MD and BL bits of the SR register are changed by the LDC instruction, an exception is

accepted according to the changed SR value from the next instruction.* A processing-

completion type exception is accepted before the next instruction is executed. An interrupt

and DMA address error in re-execution type exceptions are accepted before the next

instruction is executed.

Note: * If an LDC instruction is executed for the SR, the following instructions are re-fetched

and an instruction fetch exception is accepted according to the modified SR value.

SH7721 bảng dữ liệu(PDF) 303 Page - Renesas Technology Corp