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SH7713 bảng dữ liệu(PDF) 154 Page - Renesas Technology Corp |
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SH7713 bảng dữ liệu(HTML) 154 Page - Renesas Technology Corp |
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154 / 904 page ![]() Section 3 DSP Operating Unit Rev.1.50 Aug. 30, 2006 Page 114 of 860 REJ09B0288-0150 Table 3.19 DC Bit Update Definitions CS [2:0] Condition Mode Description 0 0 0 Carry or borrow mode The DC bit is set if an ALU arithmetic operation generates a carry or borrow, and is cleared otherwise. When a PSHA or PSHL shift instruction is executed, the last bit data shifted out is copied into the DC bit. When an ALU logical operation is executed, the DC bit is always cleared. 0 0 1 Negative value mode When an ALU or shift (PSHA) arithmetic operation is executed, the MSB of the result, including the guard bits, is copied into the DC bit. When an ALU or shift (PSHL) logical operation is executed, the MSB of the result, excluding the guard bits, is copied into the DC bit. 0 1 0 Zero value mode The DC bit is set if the result of an ALU or shift operation is all- zeros, and is cleared otherwise. 0 1 1 Overflow mode The DC bit is set if the result of an ALU or shift (PSHA) arithmetic operation exceeds the destination register range, excluding the guard bits, and is cleared otherwise. When an ALU or shift (PSHL) logical operation is executed, the DC bit is always cleared. 1 0 0 Signed greater-than mode This mode is similar to signed greater-or-equal mode, but DC is cleared if the result is all-zeros. DC = ~{(negative value ^ over-range) | zero value}; In case of arithmetic operation DC = 0; In case of logical operation 1 0 1 Signed greater-or- equal mode If the result of an ALU or shift (PSHA) arithmetic operation exceeds the destination register range, including the guard bits (over-range), the definition is the same as in negative value mode. If the result is not over-range, the definition is the opposite of that in negative value mode. When an ALU or shift (PSHL) logical operation is executed, the DC bit is always cleared. DC = ~(negative value ^ over-range); In case of arithmetic operation DC = 0 ; In case of logical operation 1 1 0 Reserved (setting prohibited) 1 1 1 Reserved (setting prohibited) |
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