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SH7708 bảng dữ liệu(PDF) 203 Page - Renesas Technology Corp

tên linh kiện SH7708
Giải thích chi tiết về linh kiện  SuperH??RISC engine
PDF  633 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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SH7708 bảng dữ liệu(HTML) 203 Page - Renesas Technology Corp

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185
CAP2
VCC (PLL2)
VCC (PLL1)
VCC
C1 = 470 pF
C2 = 470 pF
VSS
CAP1
VSS (PLL2)
VSS (PLL1)
Avoid crossing
signal lines
Power supply
Reference values
C2
C1
Figure 9.9 Points for Attention when Using PLL Oscillator Circuit
Power Supply Pin Wiring: To prevent mutual interference between power supply pins V
CC
(PLL1), V
CC (PLL2) and power supply pins VSS (PLL1), VSS (PLL2), use independent wiring
patterns for these two systems, and also other digital V
CC and VSS pins, from the board power
supply source.
External Device Connection: When connecting a device such as synchronous DRAM that
requires timing adjustment, since the AC characteristics are based on the connection of a 30 pF
capacitive load to the CKIO output, the total capacitive load of CKIO should be 30 pF or less. If
the total capacitive load of the CKIO output exceeds 30 pF, a device requiring timing adjustment
should be connected directly to CKIO, while in the case of a device without stringent timing
adjustment requirements, the CKIO output should be received by a buffer to allow the total
capacitive load of the CKIO output to be reduced.
SH-3
CKIO
SDRAM
CKIO total capacitive load
≤ 30 pF
Clock driver
G/A
Figure 9.10 System Connection Example



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