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M16C/62 bảng dữ liệu(PDF) 150 Page - Renesas Technology Corp |
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M16C/62 bảng dữ liệu(HTML) 150 Page - Renesas Technology Corp |
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150 / 621 page ![]() Clock asynchronous serial I/O (UART) mode Mitsubishi microcomputers M16C / 62 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 135 • Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit) Figure 1.19.18. Typical receive timing in UART mode _______ _______ (a) Separate CTS/RTS pins function (UART0) _______ _______ _______ Setting the CTS/RTS separate bit (bit 6 of address 03B016) to "1" inputs/outputs the CTS signal and _______ _______ _______ _______ _______ RTS signal from different pins. Choose which to use, CTS or RTS, by use of the CTS/RTS function select bit (bit 2 of address 03A416). This function is effective in UART0 only. With this function cho- _______ _______ _______ _______ sen, the user cannot use the CTS/RTS function. Set "0" both to the CTS/RTS function select bit (bit _______ _______ 2 of address 03AC16) and to the CTS/RTS disable bit (bit 4 of address 03AC16). (b) Sleep mode (UART0, UART1) This mode is used to transfer data between specific microcomputers among multiple microcomputers connected using UARTi. The sleep mode is selected when the sleep select bit (bit 7 at addresses 03A016, 03A816) is set to “1” during reception. In this mode, the unit performs receive operation when the MSB of the received data = “1” and does not perform receive operation when the MSB = “0”. D0 Start bit Sampled “L” Receive data taken in BRGi count source Receive enable bit RxDi Transfer clock Receive complete flag RTSi Stop bit “1” “0” “0” “1” “H” “L” The above timing applies to the following settings : •Parity is disabled. •One stop bit. •RTS function is selected. Receive interrupt request bit “0” “1” Transferred from UARTi receive register to UARTi receive buffer register Reception triggered when transfer clock is generated by falling edge of start bit D7 D1 Cleared to “0” when interrupt request is accepted, or cleared by software _______ _______ Figure 1.19.19. The separate CTS/RTS pins function usage Microcomputer TXD0 (P63) RXD0 (P62) IN OUT CTS RTS CTS0 (P64) RTS0 (P60) IC Note : The user cannot use CTS and RTS at the same time. |
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