M16CSLASH26 datasheet(61/239 Pages) RENESAS

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Interrupts

Renesas Technology Corp.

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Saving Registers

In the interrupt sequence, only the contents of the flag register (FLG) and that of the program counter

(PC) are saved in the stack area.

First, the processor saves the four higher-order bits of the program counter, and 4 upper-order bits and 8

lower-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 lower-order bits of the

program counter. Figure 1.9.6 shows the state of the stack as it was before the acceptance of the

interrupt request, and the state the stack after the acceptance of the interrupt request.

To save other necessary registers, use the PUSHM instruction to save these registers except the stack

pointer (SP)at the beginning of the interrupt routine.

Address

Content of previous stack

Stack area

[SP]

Stack pointer

value before

interrupt occurs

Stack status before interrupt request

is acknowledged

Stack status after interrupt request

is acknowledged

Content of previous stack

m + 1

MSB

LSB

Address

Flag register (FLGL)

Content of previous stack

Stack area

Flag register

(FLGH)

Program

counter (PCH)

[SP]

New stack

pointer value

Content of previous stack

m + 1

MSB

LSB

Program counter (PCL)

Program counter (PCM)

m - 1

m - 2

m - 3

m - 4

m - 1

m - 2

m - 3

m - 4

Figure 1.9.6. State of stack before and after acceptance of interrupt request

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