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R8C/15 bảng dữ liệu(PDF) 33 Page - Renesas Technology Corp |
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R8C/15 bảng dữ liệu(HTML) 33 Page - Renesas Technology Corp |
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33 / 277 page ![]() R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 21 of 253 REJ09B0164-0210 5.1 Hardware Reset A reset is applied using the RESET pin. When an “L” signal is applied to the RESET pin while the power supply voltage meets the recommended performance condition, the pins, CPU and SFR are reset (refer to Table 5.2 Pin Status after Reset). When the input level applied to the RESET pin changes “L” to “H”, the program is executed beginning with the address indicated by the reset vector. After reset, the low- speed on-chip oscillator clock divided-by-8 is automatically selected for the CPU clock. Refer to 4. Special Function Register (SFR) for the status of the SFR after reset. The internal RAM is not reset. If the RESET pin is pulled “L” during writing to the internal RAM, the internal RAM will be in indeterminate state. Figure 5.4 shows the Example of Hardware Reset Circuit and Operation and Figure 5.5 shows the Example of Hardware Reset Circuit (Use Example of External Power Supply Voltage Detection Circuit) and Operation. 5.1.1 When the power supply is stable (1) Apply an “L” signal to the RESET pin. (2) Wait for 500 µs (1/fRING-S×20). (3) Apply an “H” signal to the RESET pin. 5.1.2 Power on (1) Apply an “L” signal to the RESET pin. (2) Let the power supply voltage increase until it meets the recommended performance condition. (3) Wait for td(P-R) or more until the internal power supply stabilizes (Refer to 19. Electrical Characteristics). (4) Wait for 500 µs (1/fRING-S×20). (5) Apply an “H” signal to the RESET pin. |
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