R8CSLASH15 datasheet(178/277 Pages) RENESAS

tên linh kiện	R8C/15

Giải thích chi tiết về linh kiện	16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / R8C/Tiny SERIES

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R8C/14 Group, R8C/15 Group

15. Clock Synchronous Serial I/O with Chip Select (SSU)

Rev.2.10

Jan 19, 2006

Page 166 of 253

REJ09B0164-0210

Figure 15.19

Example of Operation in Data Receive (4-Wire Bus Communication Mode)

SSCK

SSI

• When CPHS bit=0 (data download at even edges) and CPOS bit=0 (“H” when clock stops)

SCS

(Output)

SSCK

• When CPHS bit=1 (data download at odd edges) and CPOS bit=0 (“H” when clock stops)

CPHS and CPOS : Bit in SSMR register

1 Frame

RDRF Bit in

SSSR Register

“0”

“1”

RSSTP Bit in

SSCRH Register

“0”

“1”

Dummy read in

SSRDR register

Process by

Program

1 Frame

High-Impedance

SCS

(Output)

Data read in SSRDR

RXI interrupt request

is generated

RXI interrupt request

is generated

Data read in SSRDR

RXI interrupt request

is generated

SSI

1 Frame

RDRF Bit in

SSSR Register

“0”

“1”

RSSTP Bit in

SSCRH Register

“0”

“1”

Dummy read in

SSRDR register

Process by

Program

1 Frame

Data read in SSRDR

RXI interrupt request

is generated

RXI interrupt request

is generated

RXI interrupt request

is generated

Set RSSTP

bit to “1”

Data read in SSRDR

Set RSSTP

bit to “1”

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