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M32C/86 bảng dữ liệu(PDF) 435 Page - Renesas Technology Corp

tên linh kiện M32C/86
Giải thích chi tiết về linh kiện  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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M32C/86 bảng dữ liệu(HTML) 435 Page - Renesas Technology Corp

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25. Flash Memory Version
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25.3.6 Data Protect Function
Each block in the flash memory has a nonvolatile lock bit. The lock bit is enabled by setting the FMR02 bit
to "0" (lock bit enabled). The lock bit individually protects (locks) each block against program and erase.
This prevents data from being inadvertently written to or erased from the flash memory.
• When the lock bit status is set to "0", the block is locked (block is protected against program and erase).
• When the lock bit status is set to "1", the block is not locked (block can be programmed or erased).
The lock bit status is set to "0" (locked) by executing the lock bit program command and to "1" (unlocked)
by erasing the block. The lock bit status cannot be set to "1" by any commands.
The lock bit status can be read by the read lock bit status command.
The lock bit function is disabled by setting the FMR02 bit to "1". All blocks are unlocked. However,
individual lock bit status remains unchanged. The lock bit function is enabled by setting the FMR02 bit to
"0". Lock bit status is retained.
If the block erase or erase all unlocked block command is executed while the FMR02 bit is set to "1", the
target block or all blocks are erased regardless of lock bit status. The lock bit status of each block are set
to "1" after an erase operation is completed.
Refer to 25.3.5 Software Commands for details on each command.
25.3.7 Status Register (SRD Register)
The SRD register indicates the flash memory operating state and whether or not an erase or program
operation is completed as expected. The FMR00, FMR06 and FMR07 bits in the FMR0 register indicate
SRD register states.
Table 25.5 shows the SRD register.
In EW mode 0, the SRD register can be read when the followings occur.
• Any even address in the user ROM area is read after writing the read status register command
• Any even address in the user ROM area is read from when the program, block erase, erase all
unlocked block, or lock bit program command is executed until when the read array command is
executed.
25.3.7.1 Sequencer Status (SR7 and FMR00 Bits )
The sequencer status indicates the flash memory operating state. It is set to "0" while the program,
block erase, erase all unlocked block, lock bit program, or read lock bit status command is being
executed; otherwise, it is set to "1".
25.3.7.2 Erase Status (SR5 and FMR07 Bits)
Refer to 25.3.8 Full Status Check.
25.3.7.3 Program Status (SR4 and FMR06 Bits)
Refer to 25.3.8 Full Status Check.



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