M32CSLASH86 datasheet(368/505 Pages) RENESAS

368 / 505 page

Page 345

23. CAN Module

)

(

CANi Global Mask Register Extended ID1(1)

CANi Local Mask Register A Extended ID1(1)

CANi Local Mask Register B Extended ID1(1) (i=0,1)

EID6M

EID7M

EID8M

EID9M

EID10M

EID11M

EID13M

EID12M

Extended ID6

0: No ID is verified

1: ID is verified

Extended ID7

Extended ID8

Extended ID9

Extended ID10

Extended ID11

Extended ID12

Extended ID13

Bit Name

Function

Bit

Symbol

Address

After Reset(2)

C0GMR3, C1GMR3

022B16, 02AB16

0016

C0LMAR3, C1LMAR3

023316(3), 02B316(4)

0016

C0LMBR3, C1LMBR3

023B16(5), 02BB16(6)

0016

NOTES:

1. The CiGMR3, CiLMAR3 and CiLMBR3 registers can be accessed only when the BANKSEL bit in

the CiCTLR1 register is set to "1" (mask register selected).

2. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after

reset, supplying the clock to the CAN module, and setting the BANKSEL bit to "0".

3. The C0LMAR3 register shares the same address with the C0MCTL3 register.

4. The C1LMAR3 register shares the same address with the C1MCTL3 register.

5. The C0LMBR3 register shares the same address with the C0MCTL11 register.

6. The C1LMBR3 register shares the same address with the C1MCTL11 register.

Figure 23.25 C0GMR3, C0LMAR3 and C0LMBR3 Registers

C1GMR3, C1LMAR3 and C1LMBR3 Registers

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