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HD6432351 bảng dữ liệu(PDF) 154 Page - Renesas Technology Corp |
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HD6432351 bảng dữ liệu(HTML) 154 Page - Renesas Technology Corp |
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154 / 1025 page ![]() Section 5 Interrupt Controller Rev. 3.00 Sep 15, 2006 page 120 of 988 REJ09B0330-0300 Table 5.11 summarizes interrupt source selection and interrupt source clearance control according to the settings of the DTA bit of DMABCR in the DMAC, the DTCE bit of DTCEA to DTCEF in the DTC and the DISEL bit of MRB in the DTC. Table 5.11 Interrupt Source Selection and Clearing Control Settings DMAC DTC Interrupt Source Selection/Clearing Control DTA DTCE DISEL DMAC DTC CPU 0 0 * X ∆ 1 0 ∆ X 1 ∆ 1 * * ∆ X X Legend: ∆ : The relevant interrupt is used. Interrupt source clearing is performed. (The CPU should clear the source flag in the interrupt handling routine.) : The relevant interrupt is used. The interrupt source is not cleared. X : The relevant bit cannot be used. * : Don’t care (4) Notes on Use SCI and A/D converter interrupt sources are cleared when the DMAC or DTC reads or writes to the prescribed register, and are not dependent upon the DTA bit or DISEL bit. |
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