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H838532H bảng dữ liệu(PDF) 321 Page - Renesas Technology Corp

tên linh kiện H838532H
Giải thích chi tiết về linh kiện  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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Section 10 Serial Communication Interface
Rev. 1.00 May 30, 2008 Page 301 of 484
REJ09B0436-0100
Bit 4: Framing error (FER)
Bit 4 indicates that a framing error has occurred during reception in asynchronous mode.
Bit 4
FER
Description
0
Reception in progress or completed*
1
(initial value)
Clearing condition:
After reading FER = 1, cleared by writing 0 to FER
1
A framing error has occurred during reception
Setting condition:
When the stop bit at the end of the receive data is checked for a value of 1 at the end
of reception, and the stop bit is 0*
2
Notes: 1. When bit RE in SCR3 is cleared to 0, bit FER is not affected and retains its previous
state.
2. Note that, in 2-stop-bit mode, only the first stop bit is checked for a value of 1, and the
second stop bit is not checked. When a framing error occurs the receive data is
transferred to RDR but bit RDRF is not set. Reception cannot be continued with bit FER
set to 1. In synchronous mode, neither transmission nor reception is possible when bit
FER is set to 1.



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