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H838532H bảng dữ liệu(PDF) 317 Page - Renesas Technology Corp

tên linh kiện H838532H
Giải thích chi tiết về linh kiện  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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Section 10 Serial Communication Interface
Rev. 1.00 May 30, 2008 Page 297 of 484
REJ09B0436-0100
Bit 2: Transmit end interrupt enable (TEIE)
Bit 2 selects enabling or disabling of the transmit end interrupt request (TEI) if there is no valid
transmit data in TDR when MSB data is to be sent.
Bit 2
TEIE
Description
0
Transmit end interrupt request (TEI) disabled
(initial value)
1
Transmit end interrupt request (TEI) enabled*
Note:
*
TEI can be released by clearing bit TDRE to 0 and clearing bit TEND to 0 in SSR, or by
clearing bit TEIE to 0.
Bits 1 and 0: Clock enable 1 and 0 (CKE1, CKE0)
Bits 1 and 0 select the clock source and enabling or disabling of clock output from the SCK
3x pin.
The combination of CKE1 and CKE0 determines whether the SCK
3x pin functions as an I/O port, a
clock output pin, or a clock input pin.
The CKE0 bit setting is only valid in case of internal clock operation (CKE1 = 0) in asynchronous
mode. In synchronous mode, or when external clock operation is used (CKE1 = 1), bit CKE0
should be cleared to 0.
After setting bits CKE1 and CKE0, set the operating mode in the serial mode register (SMR).
For details on clock source selection, see table 10.9 in 10.3.1, Overview.



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