công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

M5M5V216ART bảng dữ liệu(PDF) 5 Page - Renesas Technology Corp

tên linh kiện M5M5V216ART
Giải thích chi tiết về linh kiện  2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
PDF  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M5M5V216ART bảng dữ liệu(HTML) 5 Page - Renesas Technology Corp

  M5M5V216ART Datasheet HTML 1Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 2Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 3Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 4Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 5Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 6Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 7Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 8Page - Renesas Technology Corp M5M5V216ART Datasheet HTML 9Page - Renesas Technology Corp  
Zoom Inzoom in Zoom Outzoom out
 5 / 9 page
background image
M5M5V216ATP,RT
revision-03, 14.Jan.'03
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
4
AC ELECTRICAL CHARACTERISTICS
(Vcc=2.7 ~ 3.6V, unless otherwise noted)
1TTL
CL
DQ
Input rise time and f all time
Ref erence lev el
Output loads
2.7V~3.6V
VIH=2.4V,VIL=0.4V
VOH=VOL=1.5V
Transition is measured ±500mV f rom
steady state voltage.(f or ten,t dis)
5ns
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
(1) TEST CONDITIONS
Supply v oltage
Input pulse
Fig.1 Output load
Including scope and
jig capacitance
Output disable time aft er S high
tCR
ns
ta(S)
ta(OE)
tdis(S)
tdis(OE)
ten(S)
ten(OE)
tV(A)
ta(A)
70
10
35
ns
ns
ns
ns
ns
ns
ns
ns
(2) READ CYCLE
Symbol
Parameter
Limits
Units
Max
Min
Read cy cle time
Address access time
Chip select access time
Output enable access time
Data v alid time after address
ta(BC1)
ta(BC2)
By te control 1 access time
By te control 2 access time
tdis(BC1)
tdis(BC2)
Output disable time aft er BC1 high
Output disable time aft er BC2 high
Output disable time aft er OE high
ten(BC1)
ten(BC2)
Output enable time af ter BC1 low
Output enable time af ter BC2 low
Output enable time af ter S low
Output enable time af ter OE low
ns
ns
ns
ns
ns
ns
70
70
70
70
25
25
25
25
10
10
5
10
(3) WRITE CYCLE
tsu(A-WH)
tCW
tw(W)
tsu(A)
tsu(S)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
Chip select setup time
ns
70
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
Parameter
Limits
Units
Max
Min
Write cy cle time
Write pulse width
Address setup time
Address setup time with respect to W
By te control 1 setup time
Data setup time
Data hold time
Write recov ery time
Output disable time f rom OE high
Output enable time f rom W high
Output disable time f rom W low
Output enable time f rom OE low
ns
ns
ns
ns
ns
55
0
65
25
25
5
5
tsu(BC1)
tsu(BC2)
By te control 2 setup time
65
65
65
30
0
0
55
10
30
Max
Min
55
55
55
55
20
20
20
20
10
10
5
10
55
Max
Min
45
0
50
20
20
5
5
50
50
50
25
0
0
70HI
55HI
70HI
55HI



Html Pages

1 2 3 4 5 6 7 8 9


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com