4553 datasheet(42/145 Pages) RENESAS

42 / 145 page

Rev.3.02

Dec 22, 2006

page 42 of 142

REJ03B0024-0302

4553 Group

LCD FUNCTION

The 4553 Group has an LCD (Liquid Crystal Display) controller/

driver. When the proper voltage is applied to LCD power supply in-

put pins (VLC1–VLC3) and data are set in timer control register

(W4), timer LC, LCD control registers (L1, L2, L3, C1, C2), and

LCD RAM, the LCD controller/driver automatically reads the dis-

play data and controls the LCD display by setting duty and bias.

4 common signal output pins and 29 segment signal output pins

can be used to drive the LCD. By using these pins, up to 116 seg-

ments (when 1/4 duty and 1/3 bias are selected) can be controlled

to display. The LCD power input pins (VLC1–VLC3) are also used as

pins SEG0–SEG2. When SEG0–SEG2 are selected, the internal

power (VDD) is used for the LCD power.

(1) Duty and bias

There are 3 combinations of duty and bias for displaying data on

the LCD. Use bits 0 and 1 of LCD control register (L1) to select the

proper display method for the LCD panel being used.

• 1/2 duty, 1/2 bias

• 1/3 duty, 1/3 bias

• 1/4 duty, 1/3 bias

Table 11 Duty and maximum number of displayed pixels

(2) LCD clock control

The LCD clock is determined by the timer LC count source selec-

tion bit (W42), timer LC control bit (W43), and timer LC.

Accordingly, the frequency (F) of the LCD clock is obtained by the

following formula. Numbers (➀ to ➂) shown below the formula cor-

respond to numbers in Figure 32, respectively.

• When using the prescaler output (ORCLK) as timer LC count

source (W42=“1”)

F = ORCLK ✕✕

• When using the bit 4 of timer 3 as timer LC count source (W42=“0”)

F =

T34

✕✕

[LC: 0 to 15]

The frame frequency and frame period for each display method

can be obtained by the following formula:

Frame frequency =

(Hz)

Frame period =

(s)

F: LCD clock frequency

1/n: Duty

Fig. 32 LCD clock control circuit structure

Duty

1/2

1/3

1/4

Used COM pins

COM0, COM1 (Note)

COM0–COM2 (Note)

COM0–COM3

Maximum number of displayed pixels

58 segments

87 segments

116 segments

Note: Leave unused COM pins open.

LC + 1

➀➁

➂

LC + 1

➀➁

➂

Note: Count source is stopped by setting “0” to this bit.

Timer LC

1/2

W43

(Note)

T34

W42

STCK

LCD clock

(4 )

Reload register RLC

(4 )

( TLCA )

( TLCA)

➀

➁

➂

4553 bảng dữ liệu(PDF) 42 Page - Renesas Technology Corp

4553 bảng dữ liệu(HTML) 42 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL