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M38261EBFS bảng dữ liệu(PDF) 71 Page - Renesas Technology Corp |
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M38261EBFS bảng dữ liệu(HTML) 71 Page - Renesas Technology Corp |
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71 / 91 page ![]() Rev.1.00 Sep 06, 2006 page 71 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) (2) Decimal calculations ■ Execution of decimal calculations The ADC and SBC are the only instructions which will yield proper decimal notation, set the decimal mode flag (D) to “1” with the SED instruction. After executing the ADC or SBC instruction, execute another instruction before executing the SEC, CLC, or CLD instruction. ■ Notes on status flag in decimal mode When decimal mode is selected, the values of three of the flags in the status register (the N, V, and Z flags) are invalid after a ADC or SBC instruction is executed. The carry flag (C) is set to “1” if a carry is generated as a result of the calculation, or is cleared to “0” if a borrow is generated. To determine whether a calculation has generated a carry, the C flag must be initialized to “0” before each calculation. To check for a borrow, the C flag must be initialized to “1” before each calculation. (3) Multiplication and Division Instructions • The index X mode (T) and the decimal mode (D) flags do not affect the MUL and DIV instruction. • The execution of these instructions does not change the contents of the processor status register. (4) JMP instruction When using the JMP instruction in indirect addressing mode, do not specify the last address on a page as an indirect address. (5) BRK instruction When the BRK instruction is executed with the following conditions satisfied, the interrupt execution is started from the address of interrupt vector which has the highest priority. • Interrupt request bit and interrupt enable bit are set to “1”. • Interrupt disable flag (I) is set to “1” to disable interrupt. Set D flag to “1” ↓ ADC or SBC instruction ↓ NOP instruction ↓ SEC, CLC, or CLD instruction Fig. 3.3.4 Status flag at decimal calculations |
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