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M3826AE2FS bảng dữ liệu(PDF) 15 Page - Renesas Technology Corp |
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M3826AE2FS bảng dữ liệu(HTML) 15 Page - Renesas Technology Corp |
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15 / 91 page ![]() Rev.1.00 Sep 06, 2006 page 15 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) Fig. 13 Structure of PULL register A and PULL register B Pull-up Control By setting the PULL register A (address 001616) or the PULL reg- ister B (address 001716), ports P0 to P2, P4 to P6 can control pull-up with a program. However, the contents of PULL register A and PULL register B do not affect ports set to output mode and the ports are no pulled up. The PULL register A setting is invalid for pins selecting segment output with the segment output enable register and the pins are not pulled up. P00, P01 pull-up control bit P02, P03 pull-up control bit P04–P07 pull-up control bit P10–P13 pull-up control bit P14, P15 pull-up control bit P16, P17 pull-up control bit P20–P23 pull-up control bit P24–P27 pull-up control bit PULL register A (PULLA : address 001616) b7 b0 P41–P43 pull-up control bit P44–P47 pull-up control bit P50–P53 pull-up control bit P54–P57 pull-up control bit P60–P63 pull-up control bit P64–P67 pull-up control bit Not used “0” at reading) 0 : Disable 1 : Enable PULL register B (PULLB : address 001716) b7 b0 Note: The contents of PULL register A and PULL register B do not affect ports set to output mode. |
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