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ADE3800 bảng dữ liệu(PDF) 94 Page - STMicroelectronics

tên linh kiện ADE3800
Giải thích chi tiết về linh kiện  Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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Register Description by Block
ADE3800
94/138
4.17 Output Mux (OMUX)
The OMUX block formats the 1 ppc 24bpp data stream from the data path into a single or 2 ppc pixel
stream for the flat panel using RSDS or LVDS signaling at the pins.
Table 33: OMUX Registers (Sheet 1 of 3)
Register Name
Addr
Mode
Bits
Rst
Description
OMUX_CTRL0
0C30
R/W
[7:4]
00
RGB data channel reordering:
0: no changes on RGB data
2: Right shift 2 bits
A: Right rotate 2 bits
C: Right rotate 4 bits
E: Right rotate 6 bits
All other values: reserved
R/W
[3]
1: flip MSB to LSB per color (8 bits)
R/W
[2]
1: swap R and B data
R/W
[1]
0*:
- in 1ppc, A channel active
- in 2ppc, Left on A, Right on B
1:
- in 1ppc, B channel active
- in 2ppc, Left on B, Right on A
R/W
[0]
0*: 1 ppc
1: 2 ppc
Forced to 1 ppc in LVDS debug or
RSDS mode (refer to OMUX_TEST
register)
OMUX_CTRL1
0C31
R/W
[7]
00
LVDS reserved bit
0*: previous bit
1: TCON[7]
R/W
[6]
1: LVDS channel 0 to channel 3 flip and
channel 4 to channel 7 flip
R/W
[0]
1: LVDS outputs active (see Table 34)
OMUX_CTRL2
0C32
R/W
[7]
00
1: invert LVDS channel 7
R/W
[6]
1: invert LVDS channel 6
R/W
[5]
1: invert LVDS channel 5
R/W
[4]
1: invert LVDS channel 4
R/W
[3]
1: invert LVDS channel 3
R/W
[2]
1: invert LVDS channel 2
R/W
[1]
1: invert LVDS channel 1
R/W
[0]
1: invert LVDSchannel 0



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