STA680 datasheet(31/43 Pages) STMICROELECTRONICS

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STA680

Digital I/O and memory interfaces

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Figure 11.

Three SPI timing diagrams and waveform

In Table 10 are reported the timing values for the SPI interface.

5.4.1

Host micro serial peripheral interface (SPI1)

The Host Micro SPI is used as a host processor interface. The usage of this interface is

optional because the STA680 is able to communicate with an external microcontroller also

via I2C protocol (see Chapter 5.4.5, Host micro I2C interface).

The Host Micro SPI is a slave only interface.

For pin description see Table 11.

Table 10.

SPI interface timing values

Symbol

Parameter

Condition

Working rate

Unit

Min.

Max.

Tss

Chip select

8/Fsck

kHz

Fsck

Serial bit clock, slave mode

1.076

8000

kHz

Fsck

Serial bit clock, master mode

1.076

25000

kHz

Data hold time

Data setup time

SPIx_SCK cpol =0

1/Fsck

SPIx_SCK cpol =1

1/Fsck

Tss

SPIx_MOSI/MISO

SPIx_SS_N

AC00718

Table 11.

Host Micro SPI pin list

Pin name

Designation

Type

Drive

SPI1_MISO (1)

Slave only interface.

Host Micro SPI data master in/slave out

4mA

SPI1_MOSI (1)

Host Micro SPI data master out/slave in

SPI1_SCK

Host Micro SPI clock

4mA

SPI1_SS_N

Host Micro SPI active-low slave select 1

4mA

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