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DP80390 bảng dữ liệu(PDF) 82 Page - Digital Core Design

tên linh kiện DP80390
Giải thích chi tiết về linh kiện  Pipelined High Performance Microcontroller Instructions set details ver 3.10
PDF  84 Pages
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nhà sản xuất  DCD [Digital Core Design]
Trang chủ  http://www.digitalcoredesign.com
Logo DCD - Digital Core Design

DP80390 bảng dữ liệu(HTML) 82 Page - Digital Core Design

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DP80390 Instructions set details
- 82 -
All trademarks mentioned in this document
http://www.DigitalCoreDesign.com
are trademarks of their respective owners.
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.
3.44.
XRL
Instruction:
XRL <dest-byte>, <src-byte>
Function:
Logical Exclusive OR for byte variables
Description:
XRL performs the bit wise logical Exclusive OR operation between the
indicated variables, storing the results in the destination. No flags are
affected (except P, if <dest-byte> = A).
The two operands allow six addressing mode combinations. When the
destination is the accumulator, the source can use register, direct,
register-indirect, or immediate addressing; when the destination is a
direct address, the source can be accumulator or immediate data.
Note:
When this instruction is used to modify an output port, the value used
as the original port data will be read from the output data latch, not the
input pins.
3.44.1.
XRL A, RN
Operation:
(PC)
← (PC) + 1
(A)
← (A) xor (Rn)
Bytes:
1
Cycles:
1
Encoding:
0
1
1
0
1
r
r
r
3.44.2.
XRL A, DIRECT
Operation:
(PC)
← (PC) + 2
(A)
← (A) xor (direct)
Bytes:
2
Cycles:
2
Encoding:
0
1
1
0
0
1
0
1
direct address



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