ADN8102ACPZ-R7 datasheet(23/32 Pages) AD

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ADN8102

Rev. A | Page 23 of 32

High Current Setting and Output Level Shift

In low voltage applications, users must pay careful attention to

both the differential and common-mode signal levels (see Figure 41

and Table 14 and Table 15. Failure to understand the implications

of signal level and choice of ac or dc coupling almost certainly leads

to transistor saturation and poor transmitter performance.

TxHeadroom

The TxHeadroom register (Register 0x23) allows configuration

of the individual transmitters for extra headroom at the output

for high current applications. The bits in this register are active

high (default) and are one per output (see Table 17). Setting a

bit high puts the respective transmitter in a configuration for

extra headroom and setting a bit low does not provide extra

headroom. The TxHeadroom bits should only be set high when

VCC exceeds the value listed in Table 14 for a given output swing.

VTTO

VOCM

ΔVOCM

VOD

VEE

VOD p-p = 2 × VOD

Figure 41. Simplified Output Voltage Levels Diagram

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