DSP56F826 datasheet(20/60 Pages) FREESCALE

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56F827 Technical Data, Rev. 12

Freescale Semiconductor

Part 3 Specifications

3.1 General Characteristics

The 56F827 is fabricated in high-density CMOS with 5V-tolerant TTL-compatible digital inputs. The term

“5V-tolerant” refers to the capability of an I/O pin, built on a 3.3V-compatible process technology, to

withstand a voltage up to 5.5V without damaging the device. Many systems have a mixture of devices

designed for 3.3V and 5V power supplies. In such systems, a bus may carry both 3.3V- and 5V-compatible

I/O voltage levels. A standard 3.3V I/O is designed to receive a maximum voltage of 3.3V

± 10% during

normal operation without causing damage. This 5V-tolerant capability, therefore, offers the power savings

of 3.3V I/O levels while being able to receive 5V levels without being damaged.

Absolute maximum ratings given in Table 3-1 are stress ratings only, and functional operation at the

maximum is not guaranteed. Stress beyond these ratings may affect device reliability or cause permanent

damage to the device.

The 56F827 DC/AC electrical specifications are preliminary and are from design simulations. These

specifications may not be fully tested or guaranteed at this early stage of the product life cycle. Finalized

specifications will be published after complete characterization and device qualifications have been

completed.

CAUTION

This device contains protective circuitry to guard against

damage due to high static voltage or electrical fields.

However, normal precautions are advised to avoid

application of any voltages higher than maximum-rated

voltages to this high-impedance circuit. Reliability of

operation is enhanced if unused inputs are tied to an

appropriate voltage level.

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