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RMLD232UAW bảng dữ liệu(PDF) 23 Page - Emerging Memory & Logic Solutions Inc |
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RMLD232UAW bảng dữ liệu(HTML) 23 Page - Emerging Memory & Logic Solutions Inc |
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23 / 50 page ![]() 23 Rev 0.7 64Mb Low Power DDR SDRAM Advanced Power down The device enters power down mode when CKE Low, and it exits when CKE High. Once the power down mode is initiated, all of the receiver circuits except CK and CKE are gated off to reduce power consumption. The both bank should be in idle state prior to enter- ing the precharge power down mode and CKE should be set high at least 1 tCK+tIS prior to Row active command. During power down mode, refresh operations cannot be performed, therefore the device cannot remain in power down mode longer than the refresh period(tREF) of the device. CK CK (NOP) CKE Active tIS tIS Figure.18 Power down entry and exit timing 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Precharge Precharge power down Entry Precharge power down Exit Active power down Entry Active power down Exit READ tIS tPDEX tIS Command |
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