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ST75C530 bảng dữ liệu(PDF) 43 Page - STMicroelectronics |
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ST75C530 bảng dữ liệu(HTML) 43 Page - STMicroelectronics |
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43 / 84 page ![]() This appendix is dedicated to the ST75C530/540 reporting features. In the following sections the command acknowledge process and the report and status definitions are explained. VIII.1 - Command Acknowledge and Report VIII.1.1 - Command Acknowledge Process The ST75C530/540 features an acknowledge process based on a counter COMACK. On power- on reset (or INIT command), this counter’s value is set to 0. Each time a command is successfully executed by the ST75C530/540, the acknowledge counter COMACK is incremented. This allows a precise monitoring of the command entered and avoids command collision. In the case of a memory reading command (CR, TDRC, TDRW, IDT or MR) once the command entered is executed,the report area is filled and the acknowledge counter is incremented afterwards. This insures that the controller will read the value corresponding to its request. Furthermore, the ST75C530/540 resets the value of the COMSYS register and the interruption IT6 is raised. VIII.1.2 - Reports Specification The report section of the Dual Port RAM is dedi- cated to memory reading. In response to a CR, MR, MRI, MRLO, TDRC, TDRW, IDT commands, the value read is transferred to the report registers COMREP[0..1]. VIII - STATUS DESCRIPTION ASSERT INTERRUPT IT0 SET SYSERR ERR_IOCD SET SYSERR ERR_IPRM EXECUTE COMMAND CLEAR ANSWER END Yes No BEGIN COMSYS = 0 COMMAND EXIST No Yes CLEAR COMSYS ASSERT INTERRUPT IT6 COPY ANSWER INTO COMREP ASSERT INTERRUPT IT0 INCREMENT COMACK Figure 16 : Command Acknowledge Process ST75C530 - ST75C540 43/84 |
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