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ST72141K2 bảng dữ liệu(PDF) 72 Page - STMicroelectronics |
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ST72141K2 bảng dữ liệu(HTML) 72 Page - STMicroelectronics |
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72 / 132 page  ST72141K 72/132 MOTOR CONTROLLER (Cont’d) Note: The CPB, HDM, SDM, OS2 bits in the MCRB and the bits OE[5:0] are marked with *. It means that these bits are taken into account at the following commutation event (in normal mode) or when a value is written in the MPHST register when in direct access mode. For more details, re- fer to the description of the DAC bit in the MCRA register. The use of a Preload register allows all the registers to be updated at the same time. Warning: Access to Preload registers Special care has to be taken with Preload regis- ters, especially when using the ST7 BSET and BRES instructions on MTC registers. For instance, while writing to the MPHST register, you will write the value in the preload register. However, while reading at the same address, you will get the current value in the register and not the value of the preload register. All preload registers are loaded in the real regis- ters at the same time. In normal mode this is done automatically when a C event occurs, however in direct access mode (DAC bit=1) the preload regis- ters are loaded as soon as a value is written in the MPHST register. |
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