ST10F269Z2QX datasheet(20/161 Pages) STMICROELECTRONICS

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ST10F269Z2Qx

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Flash Status (see note for address)

Note: The Address of Flash Status Register is the address of the word being programmed when

Programming operation is in progress, or an address within block being erased when Erasing

operation is in progress.

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FSB.7

FSB.6 FSB.5

FSB.3

FSB.2

RRR

FSB.7

Flash Status bit 7: Data Polling Bit

Programming Operation: this bit outputs the complement of the bit 7 of the word being

programmed, and after completion, will output the bit 7 of the word programmed.

Erasing Operation: outputs a ‘0’ during erasing, and ‘1’ after erasing completion.

If the block selected for erasure is (are) protected, FSB.7 will be set to ‘0’ for about 100 µs, and

then return to the previous addressed memory data value.

FSB.7 will also flag the Erase Suspend Mode by switching from ‘0’ to ‘1’ at the start of the

Erase Suspend.

During Program operation in Erase Suspend Mode, FSB.7 will have the same behaviour as in

normal Program execution outside the Suspend mode.

FSB.6

Flash Status bit 6: Toggle Bit

Programming or Erasing Operations: successive read operations of Flash Status register will

deliver complementary values. FSB.6 will toggle each time the Flash Status register is read.

The Program operation is completed when two successive reads yield the same value. The

next read will output the bit last programmed, or a ‘1’ after Erase operation

FSB.6 will be set to‘1’ if a read operation is attempted on an Erase Suspended block. In

addition, an Erase Suspend/Resume command will cause FSB.6 to toggle.

FSB.5

Flash Status bit 5: Error Bit

This bit is set to ‘1’ when there is a failure of Program, block or chip erase operations.This bit

will also be set if a user tries to program a bit to ‘1’ to a Flash location that is currently

programmed with ‘0’.

The error bit resets after Read/Reset instruction.

In case of success, the Error bit will be set to ‘0’ during Program or Erase and then will output

the bit last programmed or a ‘1’ after erasing

FSB.3

Flash Status bit 3: Erase Time-out Bit

This bit is cleared by the EPC when the last Block Erase command has been entered to the

Command Interface and it is awaiting the Erase start. When the time-out period is finished,

after 96 µs, FSB.3 returns back to ‘1’.

FSB.2

Flash Status bit 2: Toggle Bit

This toggle bit, together with FSB.6, can be used to determine the chip status during the Erase

Mode or Erase Suspend Mode. It can be used also to identify the block being Erased

Suspended. A Read operation will cause FSB.2 to Toggle during the Erase Mode. If the Flash

is in Erase Suspend Mode, a Read operation from the Erase suspended block or a Program

operation into the Erase suspended block will cause FSB.2 to toggle.

When the Flash is in Program Mode during Erase Suspend, FSB.2 will be read as ‘1’ if address

used is the address of the word being programmed.

After Erase completion with an Error status, FSB.2 will toggle when reading the faulty sector.

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