NRF52811-QCAA-R datasheet(327/444 Pages) NORDIC

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Peripherals

6.23 TWI — I2C compatible two-wire interface

The TWI master is compatible with I2C operating at 100 kHz and 400 kHz.

TXD

(signal)

RXD

TXD

PSEL.SDA

PSEL.SCL

PSEL.SDA

RXD

(signal)

ERROR

STOP

STARTTX

STARTRX

STOPPED

RXDRDY

TXDSENT

SUSPEND

RESUME

SUSPENDED

Figure 122: TWI master's main features

6.23.1 Functional description

This TWI master is not compatible with CBUS. The TWI transmitter and receiver are single buffered.

See, TWI master's main features on page 327.

A TWI setup comprising one master and three slaves is illustrated in A typical TWI setup comprising one

master and three slaves on page 327. This TWI master is only able to operate as the only master on the

TWI bus.

TWI master

TWI slave

(Sensor)

Address = b1011000

TWI slave

Address = b1011011

SCL

TWI slave

(EEPROM)

Address = b1011001

SCL

VDD

SDA

SCL

SDA

Figure 123: A typical TWI setup comprising one master and three slaves

This TWI master supports clock stretching performed by the slaves. The TWI master is started by triggering

the STARTTX or STARTRX tasks, and stopped by triggering the STOP task.

If a NACK is clocked in from the slave, the TWI master will generate an ERROR event.

6.23.2 Master mode pin configuration

The different signals SCL and SDA associated with the TWI master are mapped to physical pins according to

the configuration specified in the PSEL.SCL and PSEL.SDA registers respectively.

If the CONNECT field of a PSEL.xxx register is set to Disconnected, the associated TWI signal is not

connected to any physical pin. The PSEL.SCL and PSEL.SDA registers and their configurations are only used

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