MK50H25 datasheet(43/64 Pages) STMICROELECTRONICS

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4.4.15 MK50H25 Internal Self Test

The MK50H25 contains an easy to use internal self test designed to test, with a high fault coverage, all

of the major blocks of the device except the DMA controller. It is suggested that a loopback test also be

performed to more completely test the DMA controller.

The following procedure should be followed to execute the internal self test:

1. Reset the device using the RESET pin.

2. Set bit 04 of CSR4.

3. Issue a Self Test Request (UPRIM=5) through CSR1.

4. Poll CSR1, waiting for the PAV bit in CSR1 to be set by the MK50H25.

5. After the PAV bit is set, read CSR1. If bit 04 is clear, the self test passed. If bit 04 is set, it failed. The

success or failure of the test is futher indicated in the PPRIM field as follows:

PPRIM

RESULT

Passed self test.

Failed the reset test of the self test.

Failed the self test in the micro controller RAM.

Failed the self test in the ALU.

Failed the self test in the timers.

Failed the self test in the transmitter and/or receiver.

Failed the self test in the CSR’s and/or bus master.

Otherwise

Failed device.

6. If the PAV bit is not set within 75 msec (SYSCLK = 10MHZ), then the MK50H25 is unable to respond

to the Self Test Request and will not complete successfully.

If the self test passes, then after clearing the PAV bit it may be immediately reexecuted from step 3, oth-

erwise re-execution should proceed from step 1.

After executing Self-Test, the MK50H25 should be reset before continuing with other testing or operation

of the device. This is recommended because the Self-Test leaves some of the timers and registers in

different states than after reset. To not reset the device after Self-Test may cause unexpected results in

further operation of the device.

USER NOTES:

MK50H25

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