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S5D3 bảng dữ liệu(PDF) 7 Page - Renesas Technology Corp |
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S5D3 bảng dữ liệu(HTML) 7 Page - Renesas Technology Corp |
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7 / 89 page ![]() R01DS0328EU0120 Rev.1.20 Page 7 of 89 Dec 13, 2023 S5D3 Datasheet 1. Overview Sampling Rate Converter (SRC) The Sampling Rate Converter (SRC) converts the sampling rate of data produced by various audio decoders, such as the WMA, MP3, and AAC. Both 16-bit stereo and monaural data are supported. See section 38, Sampling Rate Converter (SRC) in Userʼs Manual. Table 1.12 Security Feature Functional description Secure Crypto Engine 7 (SCE7) Security algorithms: - Symmetric algorithms: AES, 3DES, and ARC4 - Asymmetric algorithms: RSA, DSA, and ECC. Other support features: - TRNG (True Random Number Generator) - Hash-value generation: SHA1, SHA224, SHA256, GHASH, and MD5 - 128-bit unique ID. Table 1.13 I/O ports Feature Functional description Programmable I/O ports I/O ports for the 100-pin LGA, 100-pin LQFP - I/O pins: 67 - Input pins: 9 - Pull-Up resistors: 68 - Open-drain outputs: 67 - 5-V tolerance: 14 I/O ports for the 64-pin LQFP, 64-pin QFN - I/O pins: 35 - Input pins: 5 - Pull-Up resistors: 36 - Open-drain outputs: 35 - 5-V tolerance: 9 Table 1.11 Data processing (2 of 2) Feature Functional description |
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