8 Detailed Description

8.1 Overview

The TPSM8281x synchronous switch mode DC/DC converter power modules are based on a fixed-frequency

peak current-mode control topology. The control loop is internally compensated. To optimize the bandwidth of

the control loop to the wide range of output capacitance that can be used with the TPSM8281x, one of three

internal compensation settings can be selected. See Section 8.3.3. The compensation setting is selected either

by a resistor from COMP/FSET to GND, or by the logic state of this pin. The regulation network achieves fast

and stable operation with small external components and low-ESR ceramic output capacitors.

The devices support fixed-frequency forced PWM operation with the MODE/SYNC pin tied to a logic high level.

When the MODE/SYNC pin is set to a logic low level, the device operates in power save mode (PFM) at

low-output currents and automatically transitions to fixed-frequency PWM mode at higher output currents. In

PFM mode, the switching frequency decreases linearly based on the load to sustain high efficiency down to very

low output currents. The device can be synchronized to an external clock signal in a range from 1.8MHz to 4MHz

applied to the MODE/SYNC pin.

The TPSM8281xP versions in the VCA package use MagPack technology to deliver the highest-performance

power module design. Leveraging Texas Instruments' proprietary integrated-magnetics packaging technology,

MagPack (magnetics in package) power modules deliver industry-leading power density, high efficiency and

good thermal performance, ease of use, and reduced EMI emissions.

8.2 Functional Block Diagram

+

-

GND

VIN

EN

Oscillator

Gate Drive and Control

Device

Control

PG

Thermal

shutdown

Bias

Regulator

gm

Ipeak

VREF

SS/TR

COMP/FSET

MODE/SYNC

Izero

–

–

L

FB

Output

Discharge

RDis

VOUT

SW

Note

SW is only accessable with the VCA package

8.3 Feature Description

8.3.1 Precise Enable (EN)

The TPSM8281x starts operation when the rising EN threshold is exceeded. For proper operation, the EN pin

must be terminated and must not be left floating. Pulling the EN pin low forces the device into shutdown. In

this mode, the internal high-side and low-side MOSFETs are turned off and the entire internal control circuitry is

TPSM82810, TPSM82813

SLUSDN6D – SEPTEMBER 2019 – REVISED JUNE 2026

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