6 Specifications

6.1 Absolute Maximum Ratings

Over operating junction temperature range (unless otherwise noted) (1)

MIN

MAX

UNIT

Pin voltage(2)

VIN, EN, MODE/SYNC

–0.3

6.5

V

SW (VCA package only)

–0.3

VIN+0.3

V

SW (transient for less than 10 ns, VCA package only, while switching)

–3

10

V

FB

–0.3

4

V

COMP/FSET, PG, SS/TR, VOUT

–0.3

VIN+0.3

V

ISINK_PG

Sink current at PG pin

10

mA

TJ

Operating junction temperature

–40

125

°C

Tstg

Storage temperature

–40

125

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2)

All voltage values are with respect to the network ground terminal.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

(1)

±2000

V

Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002

(2)

±500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

VIN

Supply voltage range

2.75

6

V

VOUT

Output voltage range

0.6

5.5

V

COUT

Effective output capacitance(1)

27

47

470

µF

CIN

Effective input capacitance(1)

5

10

µF

RCF

4.5

100

kΩ

TJ

Operating junction temperature

-40

125

°C

(1)

The values given for all the capacitors in the table are effective capacitance, which includes the DC bias effect. Due to the DC

bias effect of ceramic capacitors, the effective capacitance is lower than the nominal value when a voltage is applied. Please check

the manufacturer´s DC bias curves for the effective capacitance vs DC voltage applied. Please see Section 9.3.3 about the output

capacitance vs compensation setting and output voltage.

6.4 Thermal Information

THERMAL METRIC(1)

TPSM8281x

UNIT

VCA (13 PINS)

μSIL (14 PINS)

EVM

JEDEC 51-7

EVM

JEDEC 51-5

RθJA

Junction-to-ambient thermal resistance

27.4

73.0

35.0

52.4

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

n/a(3)

34.1

n/a(3)

52.0

°C/W

RθJB

Junction-to-board thermal resistance

n/a(3)

20.9

n/a(3)

16.9

°C/W

ψJT

Junction-to-top characterization parameter

(–3)(2)

(–1.4)(2)

11.1

12.8

°C/W

ψJB

Junction-to-board characterization parameter

10.2

20.6

14.8

16.9

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report and Thermal Consideration.

www.ti.com

TPSM82810, TPSM82813

SLUSDN6D – SEPTEMBER 2019 – REVISED JUNE 2026

Copyright © 2026 Texas Instruments Incorporated

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