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AS3722 bảng dữ liệu(PDF) 78 Page - ams-OSRAM AG |
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AS3722 bảng dữ liệu(HTML) 78 Page - ams-OSRAM AG |
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78 / 199 page ![]() ams Datasheet Page 77 [v1-01] 2015-Sep-07 Document Feedback AS3722 − Detailed Descriptions- System Functions Figure 71: ADC Timing Diagram ADC Timing Diagram: Shows timing of the control and data signals of the internal ADC. Real Time Clock Description The RTC module provides time information to the system. It is implemented as second counter derived from the 32kHz oscillator delivering the necessary accurate time base. The actual time can be read from the second, minute, hour, day month year registers in BCD format. Both 24h and am/pm mode is supported. All counters are set to 0 at a power-on-reset. The host controller can set the counter to any value by setting the RTC registers. To prevent ambiguous time information because some of the registers being incremented before all of the registers have been read or written, a parallel shadow register is implemented. Every time a write/read access via the serial interface occurs the parallel shadow register is updated with the current value of the RTC counter. Any write access to the RTCsecond register will disable the update of the parallel shadow register and set the value of the appropriate byte of the parallel shadow register. Any subsequent write access to the RTCyear register will transfer the current value of the parallel shadow register to the RTCsecond/minute/hour/…/year register and the update of the parallel shadow register is enabled again. Similarly, any read access to the RTCsecond register will freeze the current value of the parallel shadow register and submit the appropriate byte adc0_start_conversion 0 11 ADC clock ADC on ADC start 16us if adc_buf_on = 0 else 96us adc0_result_not_ready adc0_D[9:0] result ready result not valid 1 12 ADC eoc 0 11 1 12 16us if adc_buf_on = 0 else 96us adc1_start_conversion adc1_result_not_ready adc1_D[9:0] result ready result not valid |
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