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AS3722 bảng dữ liệu(PDF) 46 Page - ams-OSRAM AG |
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AS3722 bảng dữ liệu(HTML) 46 Page - ams-OSRAM AG |
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46 / 199 page ![]() ams Datasheet Page 45 [v1-01] 2015-Sep-07 Document Feedback AS3722 − Detailed Descriptions- Power Management Functions Low Power LDO V2_5 Regulator Description The low power LDO V2_5 is needed to supply the chip core (analog and digital) of the device. It is designed to get the lowest possible power consumption, and still offering reasonable regulation characteristics. The regulator has three supply inputs selecting automatically the higher one. This gives the possibility to supply the chip core either with the VBAT, VSUP or VBAT_BKUP depending on the conditions. Bulk switch comparators are used to avoid any parasitic current flow. To ensure high PSRR and stability, a low-ESR ceramic capacitor of min. 0.7μF must be connected to the output. Parameter Figure 44: Low Power LDO Parameter Low Power LDO Parameter: Shows the key electrical parameter of the low power V2_5 linear regulator Figure 45: Low Power LDO External Components Low Power LDO External Components: Shows the external component parameter of the low power V2_5 linear regulator Symbol Parameter Conditions Min Typ Max Unit Supply voltage rage See VBAT, VSUP and VBAT_BKUP RON On resistance Guaranteed per design 50 Ω IOFF Shut down current 100 nA IVDD Supply current Guaranteed per design, consider chip internal load for measurements. 3μA tSTART Startup time 200 μs IOUT Output current VSUP>3.0V or VBAT>5.7V in power_off mode 3mA VOUT Output voltage 2.4 2.5 2.6 V Symbol Parameter Conditions Min Typ Max Unit CV2_5 Output capacitor Ceramic X5R or X7R 0.7 μF |
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