TMS320DM641 datasheet(85/179 Pages) TI

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Parameter Information

June 2003 − Revised October 2005

SPRS222E

4.1.1.3

AC Transient Rise/Fall Time Specifications

Figure 4−4 and Figure 4−5 show the AC transient specifications for Rise and Fall Time. For device-specific

information on these values, refer to the Recommended Operating Conditions section of this Data Sheet.

VOS (max)

VIH (min)

Minimum

Risetime

Waveform

Valid Region

t = 0.3 tc (max)†

Ground

Figure 4−4. AC Transient Specification Rise Time

† tc = the peripheral cycle time in nanoseconds (ns).

t = 0.3 tc(max)†

VIL (max)

Ground

VUS (max)

Figure 4−5. AC Transient Specification Fall Time

† tc = the peripheral cycle time in nanoseconds (ns).

4.1.1.4

Timing Parameters and Board Routing Analysis

The timing parameter values specified in this data sheet do not include delays by board routings. As a good

board design practice, such delays must always be taken into account. Timing values may be adjusted by

increasing/decreasing such delays. TI recommends utilizing the available I/O buffer information specification

(IBIS) models to analyze the timing characteristics correctly. To properly use IBIS models to attain accurate

timing analysis for a given system, see the Using IBIS Models for Timing Analysis application report (literature

number SPRA839). If needed, external logic hardware such as buffers may be used to compensate any timing

differences.

For inputs, timing is most impacted by the round-trip propagation delay from the DSP to the external device

and from the external device to the DSP. This round-trip delay tends to negatively impact the input setup time

margin, but also tends to improve the input hold time margins (see Table 4−1 and Figure 4−6).

Figure 4−6 represents a general transfer between the DSP and an external device. The figure also represents

board route delays and how they are perceived by the DSP and the external device.

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