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STM32F103XC bảng dữ liệu(PDF) 102 Page - STMicroelectronics

tên linh kiện STM32F103XC
Giải thích chi tiết về linh kiện  Performance line, ARM-based 32-bit MCU with up to 512 KB Flash, USB, CAN, 11 timers, 3 ADCs and 13 communication interfaces
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32F103XC bảng dữ liệu(HTML) 102 Page - STMicroelectronics

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Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
102/118
Figure 52.
Typical connection diagram using the ADC
1.
Refer to Table 57 for the values of CAIN, RAIN, RADC and CADC.
2.
CPARASITIC must be added to CAIN. It represents the capacitance of the PCB (dependent on soldering and
PCB layout quality) plus the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion
accuracy. To remedy this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 53 or Figure 54,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 53.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
VREF+ and VREF– inputs are available only on 100-pin packages.
ai14150b
STM32F103xx
VDD
AINx
IL±1 µA
0.6 V
VT
RAIN(1)
CAIN
VAIN
0.6 V
VT
RADC(1)
12-bit A/D
conversion
CADC(1)
VREF+
(see note 1)
STM32F103xx
VDDA
VSSA /VREF–
(see note 1)
1 µF // 10 nF
1 µF // 10 nF
ai14388b



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