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AM6422BSDFHAALVR bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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AM6422BSDFHAALVR bảng dữ liệu(HTML) 6 Page - Texas Instruments |
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6 / 273 page ![]() 3.1 Functional Block Diagram Figure 3-1 is functional block diagram for the device. Note To understand what device features are currently supported by TI Software Development Kits (SDKs), search for the AM64x Software Build Sheet located in the Downloads tab option provided at Processor-SDK-AM64x. Industrial Connectivity System Memory Security A 64x M intro_001 2x Arm® Cortex -A53 ® 256KB L2 with ECC Arm ® ® Cortex -A53 128KB TCM Arm ® Cortex -R5F ® Arm ® ® Cortex -A53 128KB TCM Arm ® Cortex -R5F ® Arm ® Cortex -R5F ® Arm ® Cortex -R5F ® Arm ® ® Cortex -M4F 256KB SRAM 2 MB SRAM with ECC DDR4/LPDDR4 with inline ECC 2x MMCSD AES MD5 SHA 3DES PKA DRBG Secure Boot System Services 12x GP Timers 4x WWDT Sync Manager 3x EQEP 3x ECAP 9x EPWM 4x I2C GPIO 5x MCSPI 1x ADC 7x UART PCIe (C) 1x Single lane Gen 2 GPMC / ELM 8x FSI OSPI or QSPI 2x CAN-FD 1x USB 3.1 DRD (C) 3-port Gb Ethernet (B) General Connectivity 2x I2C GPIO 2x MCSPI 2x UART Isolated Connectivity (A) (for use with Cortex-M4F) Application cores Real-time cores Isolated core (A) PRU-ICSSG 2x RGMII/MII 1x ECAP 24 PWMs 1x UART 40 Real-Time GPIOs PRU-ICSSG 2x RGMII/MII 1x ECAP 24 PWMs 1x UART 40 Real-Time GPIOs 18x ƩΔ 6x Encoder 18x ƩΔ 6x Encoder A. Isolation of peripherals and M4F core is an optional feature. B. One port is internally connected only; not connected to any pins. C. USB SuperSpeed and PCIe share a common SerDes PHY. Therefore, USB will be limited to non-SuperSpeed modes when using the SerDes PHY for PCIe. Figure 3-1. Functional Block Diagram AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 SPRSP56J – JANUARY 2021 – REVISED JUNE 2026 www.ti.com 6 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: AM6442 AM6441 AM6422 AM6421 AM6412 AM6411 |
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