Rev. 1.10

11

November 25, 2015

HT9B95A/B/G

When the HT9B95A device is selected, the LCD RAM map is implemented as the following table shown.

Address

COM0

COM1

COM2

COM3

COM4

COM5

COM6

COM7

Output

00H

SEG0

01H

SEG1

02H

SEG2

03H

SEG3

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1FH

SEG31

20H

SEG32

21H

SEG33

22H

SEG34

RAM Data

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RAM Mapping of 35x8 Display Mode

When the HT9B95B/HT9B95G device is selected with 1/8 duty, the LCD RAM map is implemented as the

following table shown.

Address

COM0

COM1

COM2

COM3

COM4

COM5

COM6

COM7

Output

00H

SEG0

01H

SEG1

02H

SEG2

03H

SEG3

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

23H

SEG35

24H

SEG36

25H

SEG37

26H

SEG38

RAM Data

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RAM Mapping of 39x8 Display Mode

When the HT9B95B/HT9B95G device is selected with 1/4 duty, the LCD RAM map is implemented as the

following table shown.

Address COM0

COM1

COM2

COM3

Output

COM0

COM1

COM2

COM3

Output

00H

SEG0

SEG1

01H

SEG2

SEG3

02H

SEG4

SEG5

03H

SEG6

SEG7

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

12H

SEG36

SEG37

13H

SEG38

SEG39

14H

SEG40

SEG41

15H

SEG42

—

—

—

—

—

RAM

Data

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RAM Mapping of 43x4 Display Mode