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tên linh kiện APM32E103CET6-R
Giải thích chi tiết về linh kiện  Arm® Cortex®-M3 based 32-bit MCU
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Pag e 19
(4) This kind of multiplexing function can be configured to other pins by software (if the corresponding package model has
this pin). For details, please refer to the multiplexing function I/O chapter and the debugging setting chapter of the
user manual.
(5) Pin 5 and pin 6 of LQFP64 and below package are configured as OSC_IN and OSC_OUT function pins by default after
chip reset. The software can reset these two pins as PD0 and PD1 functions. However, for LQFP100 package, since
PD0 and PD1 are inherent function pins, it is unnecessary to re image by software. For more details, refer to the
Reuse Function I/O section and the Debug Settings section of the reference manual. In output mode, PD0 and PD1
can only be configured as 50MHz output mode.



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