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ESP32-P4 bảng dữ liệu(PDF) 63 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32-P4 bảng dữ liệu(HTML) 63 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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63 / 93 page  4 Functional Description • Using the video mode to output video stream • Outputting image patterns Pin Assignment The MIPI DSI interface uses the dedicated digital pins 34–40. 4.2.2 Connectivity Interface This subsection describes the connectivity interfaces on the chip that enable communication and interaction with external devices and networks. 4.2.2.1 UART Controller (UART) ESP32-P4 has six UART controllers, including five UARTs in the HP system and one low-power (LP) UART. Feature List Table 4-1. UART and LP UART Feautre Comparison UART Feature LP UART Feature Programmable baud rate up to 5 MBaud 260 x 8-bit RAM, shared by TX FIFOs and RX FIFOs of the UART controllers 20 x 8-bit RAM, shared by the TX FIFO and RX FIFO of LP UART Full-duplex asynchronous communication Data bits (5 to 8 bits) Stop bits (1, 1.5, or 2 bits) Parity bit Special character AT_CMD detection RS485 protocol — IrDA protocol — High-speed data communication using GDMA — Receive timeout UART as wakeup source Software and hardware flow control Three prescalable clock sources: 1. XTAL_CLK 2. RC_FAST_CLK 3. PLL_F80M_CLK Three prescalable clock sources 1. RC_FAST_CLK 2. XTAL_DIV_CLK 3. PLL_F8M_CLK Pin Assignment For UART0–UART4 interfaces, the pins used can be chosen from any GPIOs via the GPIO Matrix. By default, the pins connected to transmit and receive signals (UART0_TXD_PAD and UART0_RXD_PAD) of UART0 are multiplexed with GPIO37–GPIO38 and the eight-line interface of SPI2 controller via IO MUX. Espressif Systems 63 Submit Documentation Feedback ESP32-P4 Series Datasheet v0.5 |
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