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PIC16F87X bảng dữ liệu(PDF) 93 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  28/40-pin 8-Bit CMOS FLASH Microcontrollers
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PIC16F87X
© 1998 Microchip Technology Inc.
Preliminary
DS30292A-page 93
9.2.13
ACKNOWLEDGE SEQUENCE TIMING
An acknowledge sequence is enabled by setting the
acknowledge
sequence
enable
bit,
ACKEN
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data
bit is presented on the SDA pin. If the user wishes to
generate an acknowledge, then the ACKDT bit should
be cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(TBRG), and the SCL pin is de-asserted (pulled high).
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for TBRG . The SCL pin
is then pulled low. Following this, the ACKEN bit is
automatically cleared, the baud
rate generator is
turned off, and the SSP module then goes into IDLE
mode. (Figure 9-29)
9.2.13.13 WCOL STATUS FLAG
If the user writes the SSPBUF when an acknowledege
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
FIGURE 9-29: ACKNOWLEDGE SEQUENCE WAVEFORM
Note: Tbrg= one baud rate generator period.
SDA
SCL
Set SSPIF at the end
Acknowledge sequence starts here,
Write to SSPCON2
ACKEN automatically cleared
Cleared in
Tbrg
Tbrg
of receive
ACK
8
ACKEN = 1, ACKDT = 0
D0
9
SSPIF
software
Set SSPIF at the end
of acknowledge sequence
Cleared in
software



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