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TMS320VC5506 bảng dữ liệu(PDF) 27 Page - Texas Instruments |
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TMS320VC5506 bảng dữ liệu(HTML) 27 Page - Texas Instruments |
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27 / 120 page ![]() Introduction 27 October 2006 − Revised January 2008 SPRS375C Table 2−3. Signal Descriptions (Continued) TERMINAL NAME RESET CONDITION BK‡ FUNCTION I/O/Z† MULTIPLEXED SIGNAL NAME SUPPLY PINS CVDD S Digital Power, + VDD. Dedicated power supply for the core CPU. DVDD S Digital Power, + VDD. Dedicated power supply for the I/O pins. USBVDD S Digital Power, + VDD. Dedicated power supply for the I/O of the USB module (DP, DN , and PU) RDVDD S Digital Power, + VDD. Dedicated power supply for the I/O pins of the RTC module. RCVDD S Digital Power, + VDD. Dedicated power supply for the RTC module USBPLLVDD S Digital Power, + VDD. Dedicated power supply pin for the USB PLL. VSS S Digital Ground. Dedicated ground for the I/O and core pins. USBPLLVSS S Digital Ground. Dedicated ground for the USB PLL. MISCELLANEOUS NC No connection † I = Input, O = Output, S = Supply, Hi-Z = High-impedance ‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup, PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer |
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