UCC28056CDBVT datasheet(38/55 Pages) TI2

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ZCBoRise

ZC3

ZCBias

30 k

UCC28056

SLUSD37E – OCTOBER 2017 – REVISED NOVEMBER 2019

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CH1 = VDS

CH2 = VDR

CH3 = VCO

CH3 = VZC

Figure 28. Amplitude VZC < (VDS/401). Reduce CZC2

Capacitance

CH1 = VDS

CH2 = VDR

CH3 = VCO

CH3 = VZC

Figure 29. Amplitude VZC = (VDS/401). Correct CZC2

Capacitance

CH1 = VDS

CH2 = VDR

CH3 = VCO

CH3 = VZC

Figure 30. Amplitude VZC > (VDS/401). Increase CZC2 Capacitance

9.2.2.3.1

Voltage Spikes on the ZCD/CS pin Waveform

Voltage offset on the ZCD/CS pin is likely to result from high-amplitude switching edge spikes on the waveform

applied to this pin. These switching edge spikes are clamped by any non-linear controller, such as the internal

ESD structures, and upset the DC operating point of the divider. This can be observed as a voltage offset on the

ZCD/CS pin signal, particularly at times when rate of change of current is highest (high load around the Line

voltage peaks). When designing the ZCD/CS pin divider, prevent it from picking up switching edge spikes. Use of

a low inductance type current sense resistor is also important for the same reason. If necessary an RC filter, with

a time constant of approximately 30 ns, may be added between the voltage divider and the ZCD/CS pin to

attenuate switching edge spikes. Ensure the capacitance (CZC3) of this filter is small relative to the value of CZC2.

Limit the error introduced by the R-C filter to less than 1%, by ensuring that the series resistance is below the

value calculated in Equation 67.

(67)

UCC28056CDBVT bảng dữ liệu(PDF) 38 Page - Texas Instruments