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L99PM72GXP bảng dữ liệu(PDF) 7 Page - STMicroelectronics

tên linh kiện L99PM72GXP
Giải thích chi tiết về linh kiện  Advanced power management system IC with embedded LIN and high speed CAN transceiver supporting CAN Partial Networking
PDF  129 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99PM72GXP bảng dữ liệu(HTML) 7 Page - STMicroelectronics

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L99PM72GXP
List of tables
8
Table 49.
Write command format: command byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 50.
Write command format: data byte 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 51.
Write command format: data byte 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 52.
Format of data shifted out at SDO during write cycle: global status register . . . . . . . . . . . 81
Table 53.
Format of data shifted out at SDO during write cycle: data byte 1 . . . . . . . . . . . . . . . . . . . 81
Table 54.
Format of data shifted out at SDO during write cycle: data byte 2 . . . . . . . . . . . . . . . . . . . 81
Table 55.
Read command format: command byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 56.
Read command format: data byte 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 57.
Read command format: data byte 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 58.
Format of data shifted out at SDO during read cycle: global status register. . . . . . . . . . . . 83
Table 59.
Format of data shifted out at SDO during read cycle: data byte 1 . . . . . . . . . . . . . . . . . . . 83
Table 60.
Format of data shifted out at SDO during read cycle: data byte 2 . . . . . . . . . . . . . . . . . . . 83
Table 61.
Read and clear status command format: command byte . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 62.
Read and clear status command format: data byte 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 63.
Read and clear status command format: data byte 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 64.
Format of data shifted out at SDO during read and clear status: global status register . . . 84
Table 65.
Format of data shifted out at SDO during read and clear status: data byte 1. . . . . . . . . . . 84
Table 66.
Format of data shifted out at SDO during read and clear status: data byte 2. . . . . . . . . . . 84
Table 67.
Read device information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 68.
ID-header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 69.
Family identifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 70.
Silicon version identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 71.
SPI-frame-ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 72.
SPI register: command byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 73.
SPI register: mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 74.
SPI register: CTRL register selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 75.
SPI register: STAT register selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 76.
Overview of control register data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 77.
Control register 1: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 78.
Control register 1, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 79.
Control register 1, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 80.
Control register 2: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 81.
Control register 2, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 82.
Control register 2, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 83.
Control register 3: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 84.
Control register 3, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 85.
Control register 3, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Table 86.
Control register 4: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 87.
Control register 4, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Table 88.
Control register 4, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Table 89.
Control register 5: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 90.
Control register 5, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 91.
Control register 5, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Table 92.
Control register 6: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Table 93.
Control register 6, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Table 94.
Control register 6, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Table 95.
Control register 7: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table 96.
Control register 7, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table 97.
Control register 7, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table 98.
Control register 8: command and data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Table 99.
Control register 8, data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Table 100.
Control register 8, bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106



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