MS85R4M1TA datasheet(3/25 Pages) RAMXEED

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DS501-00093-1v1-E

MS85R4M1TA



PIN DESCRIPTIONS

Pin Number(TSOP)

Pin Name

Functional Description

39, 5 to 1, 44 to 42,

27 to 18

A0 to A18

Address Input pins

Select 262,144 words in FeRAM memory array by 18

Address Input pins. When these address inputs are changed

during /CE equals to “L” level, reading operation of data

selected in the address after transition will start.

9 to 10, 13 to 14,

31 to 32, 35 to 36

I/O0 to I/O7

Data Input/Output pins

These are 8 bits bidirectional pins for reading and writing.

/CE

Chip Enable Input pin

In case the /CE equals to “L” level and /ZZ equals to “H” level,

device is activated and enables to start memory access.

In writing operation, input data from I/O pins are latched at

the rising edge of /CE and written to FeRAM memory array.

/WE

Write Enable Input pin

Writing operation starts at the falling edge of /WE.

Input data from I/O pins are latched at the rising edge of /WE

and written to FeRAM memory array.

/OE

Output Enable Input pin

When the /OE is “L” level, valid data are output to data bus.

When the /OE is “H” level, all I/O pins become high

impedance (High-Z) state.

/ZZ

Sleep Mode Input pin

When the /ZZ becomes to “L” level, device transits to the

Sleep Mode.

During reading and writing operation, /ZZ pin shall be hold

“H” level.

11, 33

VDD

Supply Voltage pins

Connect all two pins to the power supply.

12, 29, 34, 37, 38

VSS

Ground pins

Connect all pins to ground.

7 to 8, 15 to 16, 28, 30

No connected pins

Leave them open or connect to VDD or VSS.

Note: Please refer to the timing diagram for functional description of each pin.

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