6

LM2907-N, LM2917-N

SNAS555D – JUNE 2000 – REVISED DECEMBER 2016

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Copyright © 2000–2016, Texas Instruments Incorporated

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.4 Thermal Information

THERMAL METRIC(1)

LM2907, LM2917

UNIT

P (PDIP)

D (SOIC)

NFF (PDIP)

D (SOIC)

8 PINS

8 PINS

14 PINS

14 PINS

RθJA

Junction-to-ambient thermal resistance

77.6

110

69.1

83.7

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

80.5

53.9

64.8

42.1

°C/W

RθJB

Junction-to-board thermal resistance

54.8

50.4

49.1

38

°C/W

ψJT

Junction-to-top characterization parameter

37.6

9.1

35.1

7.7

°C/W

ψJB

Junction-to-board characterization

parameter

54.8

49.9

49

37.7

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal

resistance

—

—

—

—

°C/W

(1)

Hysteresis is the sum VTH – (–VTH), offset voltage is their difference. See test circuit.

(2)

VOH = 0.75 × VCC – 1 VBE and VOL = 0.25 × VCC – 1 VBE, therefore VOH – VOL = VCC / 2. The difference (VOH – VOL) and the mirror gain

(I2 / I3) are the two factors that cause the tachometer gain constant to vary from 1.

(3)

Ensure that when choosing the time constant R1 × C1 that the maximum anticipated output voltage at CP2/IN+ can be reached with I3 ×

R1. The maximum value for R1 is limited by the output resistance of CP2/IN+ which is greater than 10 MΩ typically.

(4)

Nonlinearity is defined as the deviation of VOUT (at CP2/IN+) for fIN = 5 kHz from a straight line defined by the VOUT at 1 kHz and VOUT

at 10 kHz. C1 = 1000 pF, R1 = 68 kΩ and C2 = 0.22 µF.

7.5 Electrical Characteristics

VCC = 12 VDC, TA = 25°C, see test circuit

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TACHOMETER

Input thresholds

VIN = 250 mVp-p at 1 kHz

(1)

±10

±25

±40

mV

Hysteresis

VIN = 250 mVp-p at 1 kHz

(1)

30

mV

LM29x7 offset voltage

VIN = 250 mVp-p at 1 kHz

(1)

3.5

10

mV

VIN = 250 mVp-p at 1 kHz (8-pin LM29x7)

(1)

5

15

Input bias current

VIN = ±50 mVDC

0.1

1

μA

VOH

High level output voltage

For CP1, VIN = 125 mVDC

(2)

8.3

V

VOL

Low level output voltage

For CP1, VIN = –125 mVDC

(2)

2.3

V

I2, I3

Output current

V2 = V3 = 6 V(3)

140

180

240

μA

I3

Leakage current

I2 = 0, V3 = 0

0.1

μA

K

Gain constant

See(2)

0.9

1

1.1

Linearity

fIN = 1 kHz, 5 kHz, or 10 kHz

(4)

–1%

0.3%

1%

OP AMP AND COMPARATOR

VOS

Input offset voltage

VIN = 6 V

3

10

mV

IBIAS

Bias current

VIN = 6 V

50

500

nA

Input common-mode voltage

0

VCC–1.5

V

Voltage gain

200

V/mV

Output sink current

VC = 1

40

50

mA

Output source current

VE = VCC –2

10

mA

Saturation voltage

ISINK = 5 mA

0.1

0.5

V

ISINK = 20 mA

1

V

ISINK = 50 mA

1

1.5

V

ZENER REGULATOR

Regulator voltage

RDROP = 470 Ω

7.56

V

Series resistance

10.5

15

Ω

Temperature stability

1

mV/°C

Total supply current

3.8

6

mA