LM2907MSLASHNOPB datasheet(4/44 Pages) TI2

4 / 44 page

TACH+

CP1

CP2

GND

IN+

TACH±

EMIT

IN±

V+

COL

Not to scale

LM2907-N, LM2917-N

SNAS555D – JUNE 2000 – REVISED DECEMBER 2016

www.ti.com

Product Folder Links: LM2907-N LM2917-N

Submit Documentation Feedback

NFF and D Package

14-Pin PDIP and SOIC

Top View

Pin Functions: 14 Pins

I/O

DESCRIPTION

NAME

NO.

COL

The collector of the bipolar junction transistor

CP1

A capacitor placed on this pin will be charged up to VCC/2 by a constant current source of 180 µA

typical at the start of every positive half cycle. At the beginning of negative half cycles this capacitor is

discharged the same amount at the same rate.

CP2

The charge pump sources current out of this pin equal to the absolute value of the capacitor current

on CP1. A resistor and capacitor in parallel connected to this pin filters the current pulses into the

output voltage.

EMIT

The emitter of the bipolar junction transistor

GND

Ground

IN+

The noninverting input to the high gain op amp

IN–

The inverting input to the high gain op amp

6, 7, 13, 14

—

No connect

TACH+

Positive terminal for the input signal that leads to the noninverting terminal of the internal Schmitt-

Trigger comparator.

TACH–

Negative terminal for the input signal that leads to the noninverting terminal of the internal Schmitt-

Trigger comparator.

V+

Supply voltage

LM2907M/NOPB bảng dữ liệu(PDF) 4 Page - Texas Instruments

LM2907M/NOPB bảng dữ liệu(HTML) 4 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

bảng dữ liệu tải về

Link URL