L9907 datasheet(37/49 Pages) STMICROELECTRONICS

37 / 49 page

DS11800 Rev 5

37/49

L9907

SPI operation

microprocessor must guarantee a dis-overlap between reading of DIAG2 register and

PWM commands toggling.

4.1.1

SDO

SDO CMD1 to CMD4 registers - Response to SDI commands: B(15:13)=000 till 100

SDO responds in the current SPI cycle with the content of the command register CMDn

(n=1 to 4) that is being addressed in the previous SPI cycle. In such a way the controller

may verify the command data being stored in the proper register (WE=1 in the previous SPI

cycle), or simply verify the correct IC data retention of initially programmed commands

(WE=0).

SDO DIAG register - Diagnostic read cycle: B(15:13) = 110

During its operation the IC detects diagnostic data that is made available at SDO SPI output

pin. Such diagnostic data is mainly related to output gate drivers, in order to check for

example under voltage condition on high-side or low-side (UV_HS and UV_LS) together

with over current information due to a short circuit fault on each external high and low-side

FET (VSCHS1-2-3 and VSCLS1-2-3). Additionally the device diagnostic allows also to

check Thermal Shutdown Fault (THSD), under and over voltage condition on VB line (VBUV

and VBOV) and VCC line (VccOV, VccUV).

Table 36. SDO bit map definition

Item B15

B14

B13

B12

B11

B10

CMD0

0000

DT1

DT0

IG_1

IG_0

G21

G20

Off2

G11

G10

Off1

CMD1

001

CMD2

010

CMD3

011

CMD4

100

DIAG

110

VBOV

VBUV VccOV VccUV

DIAG2

111

SHT3

SHT2

SHT1

1. Not cleared after read.

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