L9907 datasheet(35/49 Pages) STMICROELECTRONICS

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DS11800 Rev 5

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L9907

SPI operation

CMD3 register - Current Sense amplifier offset calibration: B(15:13) = 011

SDI bit DIS_BSTov (B12)

This bit is accessible for writing only if AND(EN1,EN2) = '0': trying to write it

without lowering AND(EN1,EN2) will not generate any SPI error but command will

be simply ignored for the specific bit. Once set to '1', CMD3 B12 disables the over

voltage protection on the boost regulator BST_C pin. This bit defaults to '0'.

SDI bits TRIM24 to TRIM10 (B9 to B0)

The input offset of both current sense amplifiers can be calibrated separately by

properly setting the bits of the CMD3 SPI Register. Such a register can be

accessed through SDI bits B(9:0). Bits B(9:5) are dedicated to offset calibration of

Current Sense amplifier 2, while bits B(4:0) are dedicated to current sense

amplifier 1. The encoded value is a signed representation, and the values "10000"

and "00000", both correspond to 0 mV calibration.

Table 34. Current sense amplifier input offset calibration

CMD4 register - Fault effect enabling B(15:13)=100

In order to avoid unsafe change of fault management settings, as for the CMD1 register, it is

not possible to write CMD4 register during normal Output Gate Drive operation. For this

reason at least one Enable signal EN1 or EN2 must be deasserted in order to update the

Since the Enable signals EN1 and EN2 also affect the output gate drives, a deglitch filter is

implemented on both of them. This filter is active on the falling edges of EN1 or EN2 signal.

Current sense amplifier 2(1)

calibration input offset

B9(B4)=

Trim24

(Trim14)

B8(B3)=

Trim23

(Trim13)

B7(B2)=

Trim22

(Trim12)

B6(B1)=

Trim21

(Trim11)

B5(B0)=

Trim20

(Trim10)

-15 mV

1111

-14 mV

1110

-13 mV

1101

...

-3 mV

0011

-2 mV

0010

-1 mV

0001

0 mV

0000

0 mV

0000 (0000 = Default)

+1 mV

0001

+2 mV

0010

+2 mV

0011

...

+13 mV

1101

+14 mV

1110

+15 mV

1111

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